Job at Broadcom
Principal Engineer
- Employer
- Broadcom
- Location
- China-Shanghai-Zhangjiang Hi Tech
- Workplace
- Not supplied
- Employment
- full-time
- Published
- First listed on USASI
This posting comes from Broadcom’s own Workday job board. USASI checks that board twice a day and removes this page once the employer closes the posting. The description below is Broadcom’s text as published; USASI does not edit it, does not recruit, and does not take applications. How jobs are collected.
Job description
Please Note:
1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)
2. If you already have a Candidate Account, please Sign-In before you apply.
Job Description:
Broadcom Limited offers an excellent opportunity to contribute to a team environment and to grow personal career path. You will be working with internal and external customers to develop state of the art IC solutions utilizing Broadcom’s leading-edge CMOS cell-based ASIC technologies. You will have responsibility for ASIC designs through all of the key development and implementation phases including RTL analysis, synthesis, design optimization, timing verification, simulation, test insertion, physical design, vector generation, and post-prototype test support. Candidates will have opportunity to work on the latest 5nm/3nm designs
Detail design tasks include
Full Chip Synthesis and STA: An ideal candidate should have some background on full chip synthesis flow (DC, DCT, DCG) for 5nm/3nm design tape out. It would be better if the candidate have the experience running full chip STA and constraint clean up flow.
Physical Design Implementation: An ideal candidate having some background in either the Physical Design which includes floor planning, placement, design closure, and DRC & LVS skills.
Overall, candidates are expected to develop the most of above skills. Candidates who have the desire to seek the in-depth and broad technical challenge should apply.
Requirements/Qualifications
- Candidates should have good understanding about ASIC design flow and solid VLSI background.
- Candidates should be able to handle block implementation/top level task independently.
- Tapeout experience in 5nm and blow process design.
- Candidate s should have strong communications and problem solving skills.
- Candidates with experience in any one of following knowledge are a plus
- DFT insertion
- Power/IVD analysis
- DRC/LVS
- Top Floorplan/STA & Low Power
- Candidate is good at Perl/Tcl/Python
Education/Certifications
Preferred Degree: MS Preferred Major: Microelectronics or related discipline
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
Similar jobs
Micron Technology
CAD Environment Programming Staff Engineer/Senior Engineer
Hashimoto, Japan
Micron Technology
CPEE Photo EUV Track Principal Engineer
Location not supplied
ServiceNow
Principal Software Engineer - Veza
San Diego, CALIFORNIA, United States
ServiceNow
Staff Software Engineer, Platform Cryptography
Santa Clara, CALIFORNIA, United States
Anthropic
Staff+ Software Engineer, Enterprise (Full Stack)
San Francisco, CA | New York City, NY
Boston Dynamics
Sr. Staff Electrical Test Engineer - Atlas
Waltham Office (POST)
Support Us
Help keep USASI useful.
Optional. No USASI account required. Payment takes place on the linked provider’s website (Buy Me a Coffee).
About supporting this project