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Job at NVIDIA

DFT Intern - 2027

Employer
NVIDIA
Location
China, Shanghai
Workplace
Not supplied
Employment
full-time
Published
First listed on USASI

Apply on NVIDIA’s site (external site)

This posting comes from NVIDIA’s own Workday job board. USASI checks that board twice a day and removes this page once the employer closes the posting. The description below is NVIDIA’s text as published; USASI does not edit it, does not recruit, and does not take applications. How jobs are collected.

Job description

DFT focus on strategy definition through logic design and insertion, pre-silicon verification, pattern generation, and ATE bringup for NVIDIA chips, with special emphasis on ATE bringup, pattern/generation and validation, yield debug, failure analysis and volume diagnosis for ramp to production.

As a DFT intern at NVIDIA, you will help own the testing methodology from strategy definition through logic design and insertion, pre-silicon verification, pattern generation, and ATE bringup.

What you’ll be doing:

  • DFT logic implementation and verification
  • Maintain DFT flow and run regression
  • Run DFT verification
  • Pattern generation and bringup

What we need to see:

  • Strong logic design and verification background
  • Possess very basic knowledge of DFT
  • Skilled in Perl/tcl programming
  • Proficient at Verilog HDL
  • Pursuing MS/PhD in EE

Ways to stand out from the crowd:

  • Prefer to have experience with logic simulators and debug tools (such as vcs, ncsim, verdi)
  • Familiar with C/C , Makefile is a plus
  • Strong problem solving and analytical skills
  • Excellent communication skills and teamwork

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you!

Apply on NVIDIA’s site (external site)

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