Job at NVIDIA
Power Architecture Engineer
- Employer
- NVIDIA
- Location
- India, Bengaluru
- Workplace
- Not supplied
- Employment
- full-time
- Published
- First listed on USASI
This posting comes from NVIDIA’s own Workday job board. USASI checks that board twice a day and removes this page once the employer closes the posting. The description below is NVIDIA’s text as published; USASI does not edit it, does not recruit, and does not take applications. How jobs are collected.
Job description
NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel.
NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work , to amplify human creativity and intelligence. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world!
What you’ll be doing:
- Be part of NVIDIA Power Architecture Group that owns end-to-end power aspects such as - ASIC power analysis, power architecture, low power design, power-aware verification, advanced power methodologies, UPF methodologies, power feature bring-up on silicon, and post-Si power correlation for NVIDIA's family of products.
- Contributing to power analysis by helping to architect, develop, verify & correlate power estimation models/tools for NVIDIA's products
- Be part of the team that architects & designs system-level power features for optimizing the dynamic and leakage power dissipation for different usecases.
- Work on power verification which includes structural, functional & power aware verification of power features of NVIDIA products by coming up with test plans, write testcases, build test bench components like Monitors, assertions and coverage points & own verification convergence across RTL, Gates and Silicon.
- Validate the effectiveness of the power features on silicon, conduct studies and contribute to the Performance/Watt improvement ideas.
- Help build power management solutions and drive innovation in energy efficiency across NVIDIA’s product portfolio.
What we need to see:
- B.Tech./M.Tech with 2+ years of experience related to Power such as Power analysis, Power Design, Power Aware Verification, UPF methodologies and Power Correlation
- Strong fundamentals in power including transistor-level leakage/dynamic characteristics of VLSI circuits
- Strong fundamentals in digital design and verilog
- Familiarity with low power design techniques such as multi-VT, Clock gating, Power gating, Voltage Islands and Dynamic Voltage-Frequency Scaling (DVFS)
- Good background in power estimation techniques, flows and algorithms
- Knowledge of power intent formats - UPF/CPF or similar
- Experience in Static Power check tools like VCLP/CLP or similar & Dynamic Power verification tools like VCS-NLP or equivalent
Ways to stand out from the crowd:
- Strong debugging and problem-solving skills
- Good communication skills and ability & desire to work as a great teammate
- Good programming skills - Python preferred (Good skills with object-oriented programming & design) preferred.
- Exposure to Power analysis tools (such as PTPX, EPS) or exposure to lab setups for power measurements like scope/DAQ with ability to analyze board level power issues is a plus
With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the most desirable employers in the world. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.
Similar jobs
Micron Technology
Hiroshima - Fab 15, Japan
Micron Technology
Hiroshima - Fab 15, Japan
SpaceX
Propulsion Engineer, Non-Destructive Evaluation (Raptor)
Hawthorne, CA
OpenAI
Software Engineer, Full Stack — Dots
New York City
$347K–$385K a year
OpenAI
Software Engineer, Mobile Web — Dots
New York City
$347K–$385K a year
SpaceX
Propulsion Engineer (Raptor Final Assembly & Tube Shop)
Hawthorne, CA
Support Us
Help keep USASI useful.
Optional. No USASI account required. Payment takes place on the linked provider’s website (Buy Me a Coffee).
About supporting this project