Job at NVIDIA
Senior Mixed Signal Circuit Design Engineer
- Employer
- NVIDIA
- Location
- Hsinchu, Taiwan · Taipei, Taiwan
- Workplace
- Not supplied
- Employment
- full-time
- Published
- First listed on USASI
This posting comes from NVIDIA’s own Workday job board. USASI checks that board twice a day and removes this page once the employer closes the posting. The description below is NVIDIA’s text as published; USASI does not edit it, does not recruit, and does not take applications. How jobs are collected.
Job description
We are looking for a senior engineer to be part of the mixed-signal design team building next generation NVLINK. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.
You will be responsible for the development and implementation of high speed interfaces, including TX/RX/Clocking/PLL. You will have hands on experience taking innovative integrated circuit designs at data rates of 50Gbps and higher from concept through silicon characterization.
What you will be doing:
- Define circuit requirements and complete design from schematic, layout, and verification to characterization.
- Conduct schematic design of deep-submicron CMOS technologies using Spectre, Hspice or like.
- Take responsibility for the architecture, transistor design and verification using industry standard EDA tools such as Cadence virtuoso.
- Optimize circuit to meet the specifications for system performance.
- Work with layout engineers by providing detailed floorplan and guidance for matching and high-speed routings.
- Provide support for post-silicon bring-up and debugging.
What we need to see:
- Master of Science or foreign equivalent degree in Electrical Engineering, Computer Engineering or related field with strong analog design background.
- 3+ years analog design experience in industry.
- CMOS Analog / Mixed Signal Circuit Design Experience in deep sub-micron process (especially in FINFET); Experience with design and verification tools (Cadence's IC design environment, analog circuit simulation tools like Spectre, HSpice, Finesim, XA)
- Experience in crafting test bench environments for component and top level circuit verification; Behavioral modeling of analog and digital circuits.
- Strong debugging and analytical skills; Analog simulation for noise analysis, loop stability analysis, ac/dc/tran analysis, monte-carlo, etc.
- Strong communication skills and ability & desire to work as a great teammate are huge plus.
Similar jobs
Intel
CPU Senior Clock Design Engineer
Bangalore, India
Intel
Senior EDA Design Automation Engineer - Digital Implementation
Penang, Malaysia
Anduril Industries
Senior Product Designer, Mission Autonomy
Washington, District of Columbia, United States
$166K–$220K a year (from the job description)
Anduril Industries
Senior Product Designer, Mission Autonomy
Costa Mesa, California, United States
$166K–$220K a year (from the job description)
Anysphere
New York · San Francisco
ServiceNow
Hyderabad, Telangana, India
Support Us
Help keep USASI useful.
Optional. No USASI account required. Payment takes place on the linked provider’s website (Buy Me a Coffee).
About supporting this project